Triple Modular Redundancy verification via heuristic netlist analysis
نویسندگان
چکیده
منابع مشابه
Triple Modular Redundancy verification via heuristic netlist analysis
Triple Modular Redundancy (TMR) is a common technique to protect memory elements for digital processing systems subject to radiation effects (such as in space, high-altitude, or near nuclear sources). This paper presents an approach to verify the correct implementation of TMR for the memory elements of a given netlist (i.e., a digital circuit specification) using heuristic analysis. The purpose...
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This paper formulates the transfer function of Triple Modular Redundancy (TMR) Fault-tolerant sensors system. The first attempt was to present a practicable model of a triple modular redundancy faulttolerant system for sensors working synchronously with same input. Analogues and digital sensors are separately modeled to show the difference in their transfer functions as resulted from their diff...
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ژورنال
عنوان ژورنال: PeerJ Computer Science
سال: 2015
ISSN: 2376-5992
DOI: 10.7717/peerj-cs.21